74HC194 DIP16 Integrated

74HC194 is a 4-bit bidirectional universal shift register. Synchronous operation of the device is determined by mode selection inputs (S0, S1). Data appearing at inputs D0 to D3 in parallel load mode (S0 and S1 HIGH) is transferred to outputs Q0 to Q3 when S0 and S1 are HIGH. When S0 is HIGH and S1 is LOW, data is entered serially via DSL and shifted from left to right; When S0 is LOW and S1 is HIGH, data is entered serially through the DSR and shifted from right to left. DSR and DSL allow multistage right or left shift data transfer without interfering with parallel load operation. If both S0 and S1 are LOW, the current data is kept in a standby mode. Mode selection and data inputs are edge triggered and respond only to the LOW to HIGH transition of the clock (CP). Inputs include clamp diodes. This enables the use of current limiting resistors to interface the inputs to voltages above VCC.